PacTech Test Wafers & Boards:
 

Test Wafers and Die:

6" Wafer with Electroless Ni/Au-Bumps
105 Chips 10 x 10 mm
21 x chip 1 (200µm pitch)
21 x chip 2 (300µm pitch)
21 x chip 3 (200/400µm pitch; area configuration)
21 x chip 4 (250µm pitch; staggered)
21 x chip 5 (100µm pitch)
chips are bumped with electroless Ni/Au
solder deposition optional (eutectic PbSn)
all chips in waffle packs

Pac Tech Testwafer from Testkit 3.1

Printed Circuit Board:

Layout PacTech 3.1
Daisy Chain Structures
Four Point Kelvin Structures

Testboard from Testkit 3.1

Flip Chip Test Kit:

1 Testwafer
4 printed circuit boards (layout PacTech 3.1)

Flip Chip Test Wafer Pac 2.0
Flip Chip Test Wafer Pac 2.1
Flip Chip Test Wafer Pac 2.2
Flip Chip Test Wafer Pac 2.3
Flip Chip Test Wafer Pac 2.4
Flip Chip Test Wafer Pac 2.5
Flip Chip Test Wafer Pac 2.6